On Optimization of Manufacturing of Field-effect Transistors to Increase Their Integration Rate in the Framework of a Double-tail Dynamic Comparator

Authors

  • E. L. Pankratov

Abstract

In this paper, we introduce an approach to increase integration rate of elements of a double-tail dynamic comparator. Framework the approach we consider a heterostructure with special configuration. Several specific areas of the heterostructure should be doped by diffusion or ion implantation. Annealing of dopant and/or radiation defects should be optimized.

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Published

2021-12-15

How to Cite

Pankratov, E. L. . (2021). On Optimization of Manufacturing of Field-effect Transistors to Increase Their Integration Rate in the Framework of a Double-tail Dynamic Comparator. Asian Journal of Computer Science Engineering(AJCSE), 6(4). Retrieved from http://ajcse.info/index.php/ajcse/article/view/171

Issue

Vol. 6 No. 4 (2021): Asian Journal of Computer Science Engineering

Section

Review Article

License

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.

This is an Open Access article distributed under the terms of the Attribution-Noncommercial 4.0 International License [CC BY-NC 4.0], which requires that reusers give credit to the creator. It allows reusers to distribute, remix, adapt, and build upon the material in any medium or format, for noncommercial purposes only.

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